DocumentCode
961266
Title
An efficient volume-removal algorithm for practical three-dimensional lithography simulation with experimental verification
Author
Scheckler, Edward W. ; Tam, Nelson N. ; Pfau, Anton K. ; Neureuther, Andrew R.
Author_Institution
California Univ., Berkeley, CA, USA
Volume
12
Issue
9
fYear
1993
fDate
9/1/1993 12:00:00 AM
Firstpage
1345
Lastpage
1356
Abstract
A fast three-dimensional volume removal algorithm for resist dissolution is presented and verified with applications to optical lithography with phase-shift masks, resist silylation, and electron-beam lithography. Memory requirements are reduced by dynamically allocating complete topography and material information only at surface cells, and setting other cells as either bulk material or developer. The dissolution algorithm uses a fixed time step and stores the volume of material remaining in the surface cells. A simple redistribution scheme is used if more volume would be removed from a cell in one time step that is currently present. The compactness and speed of the algorithm make it suitable for use on engineering workstations. Simulations requiring 100×100×100 cells can be performed in a few minutes. Theoretical defocus effects in phase-shift mask lithography and shot-size error in electron-beam lithography are compared with experiment. A dry-etch resist silylation process is also investigated
Keywords
digital simulation; electronic engineering computing; lithography; semiconductor process modelling; 3D algorithm; 3D simulation; defocus effects; dissolution algorithm; dry-etch resist; electron-beam lithography; engineering workstations; fixed time step; optical lithography; phase-shift masks; redistribution scheme; resist dissolution; resist silylation; shot-size error; three-dimensional lithography simulation; volume-removal algorithm; Computational modeling; Equations; Etching; Helium; Optical materials; Optical refraction; Proximity effect; Resists; Workstations; X-ray lithography;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.240082
Filename
240082
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