Title :
Efficient output phase assignment algorithm for PLAs
Author :
Hsu, W.-J. ; Shen, W.-Z.
Author_Institution :
Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
10/1/1993 12:00:00 AM
Abstract :
To implement a multiple output function, one has the option to realise each output with either true logic or complementary logic following with an inverter. This paper, proposes an efficient algorithm to solve this output phase assignment problem for PLA implementation. Instead of using the double-phase cover minimisation approach, a property-checking procedure is used to estimate the cost of assignments. With the estimated costs, an assignment with minimum cost is chosen. The experimental results show that the proposed algorithm can obtain excellent assignment compared with other approaches
Keywords :
logic CAD; logic arrays; PLAs; assignment cost; logic design; multiple output function; output phase assignment algorithm; property-checking procedure;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings G