• DocumentCode
    961818
  • Title

    Bit-Sequential Arithmetic for Parallel Processors

  • Author

    Sips, Henk J.

  • Author_Institution
    Department of Applied Physics, Deift University of Technology, Lorentzweg 1 2628CJ Deift, Holland.
  • Issue
    1
  • fYear
    1984
  • Firstpage
    7
  • Lastpage
    20
  • Abstract
    A bit-sequential processing element with O(n) complexity is described, where n is the wordlength of the operands. The operations performed by the element are A * B + C * D, A/B, and ¿A. The operands are fixed point or floating point numbers with variable precision. The concept of semi-on-line algorithms is introduced. A processing element that uses semi-on-line algorithms produces a result ¿ clock cycles after the absorption of the n-bit operands, where ¿ is small compared to n. In the paper the processing element and the algorithms are described. A performance comparison between the bit-sequential processing element and conventional pipelined arithmetic units is given.
  • Keywords
    Absorption; Clocks; Concurrent computing; Floating-point arithmetic; Multiprocessor interconnection networks; Parallel architectures; Parallel processing; Physics computing; Pipeline processing; Signal processing algorithms; Cost-effectiveness; floating point arithmetic; large scale integration; online algorithms; parallelism; pipelining;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1984.5009311
  • Filename
    5009311