DocumentCode :
962262
Title :
Systolic VLSI Arrays for Polynomial GCD Computation
Author :
Brent, Richard P. ; Kung, H.T.
Author_Institution :
Centre for Mathematical Analysis, The Australian National University, Canberra, Australia.
Issue :
8
fYear :
1984
Firstpage :
731
Lastpage :
736
Abstract :
The problem of finding a greatest common divisor (GCD) of any two nonzero polynomials is fundamental to algebraic and symbolic computations, as well as to the decoder implementation for a variety of error-correcting codes. This paper describes new systolic arrays that can lead to efricient VLSI solutions to both the GCD problem and the extended GCD problem.
Keywords :
Concurrent computing; Decoding; Error correction codes; Hardware; Helium; Nearest neighbor searches; Polynomials; Systolic arrays; Throughput; Very large scale integration; Algorithms; VLSI; error-correcting codes; greatest common divisor; special-purpose hardware; systolic arrays;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1984.5009358
Filename :
5009358
Link To Document :
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