DocumentCode :
962688
Title :
Modeling and Forecasting of Defect-Limited Yield in Semiconductor Manufacturing
Author :
Baron, Michael ; Takken, Asya ; Yashchin, Emmanuel ; Lanzerotti, Mary
Author_Institution :
Dept. of Math. Sci., Univ. of Texas at Dallas, Richardson, TX
Volume :
21
Issue :
4
fYear :
2008
Firstpage :
614
Lastpage :
624
Abstract :
A detailed cause-and-effect stochastic model is developed to relate the type, size, location, and frequency of observed defects to the final yield in IC manufacturing. The model is estimated on real data sets with a large portion of unclassified defects and un inspected layers, and in presence of clustering of defects. Results of this analysis are used for evaluating kill ratios and effects of different factors, identifying the most dangerous cases and the most probable causes of failures, forecasting the yield, and designing optimal yield-enhancement strategies.
Keywords :
cause-effect analysis; crystal defects; integrated circuit modelling; integrated circuit yield; stochastic processes; IC manufacturing; cause-and-effect stochastic model; defect-limited yield forecasting; defect-limited yield modeling; optimal yield-enhancement strategy; semiconductor manufacturing; Cause effect analysis; Failure analysis; Frequency; Integrated circuit modeling; Iterative algorithms; Parameter estimation; Predictive models; Semiconductor device manufacture; Semiconductor device modeling; Virtual manufacturing; Clustered defects; EM algorithm; defect characteristics; diagnostics; incomplete defect data; kill ratio; multilayer structures; process characterization; wafer inspection; yield estimation;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/TSM.2008.2005373
Filename :
4657434
Link To Document :
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