Title :
Low Temperature Double-Exposed Polyimide/Oxide Dielectric for VLSI Multilevel Metal Interconnection
Author_Institution :
Mississippi State University, Mississippi State, MS, USA
fDate :
12/1/1982 12:00:00 AM
Abstract :
By use of a double-exposed (double-etch) low temperature polyimide/oxide process, the packing density for both first and second level metal interconnection can be improved by some 35 percent and 30 percent, respectively, in the vicinity Of the via. Moreover, the complete interconnect process may be realized at temperatures below 300°C. Since polyimide can be applied in thick layers having negligible (tensile) stress, a planar surface results and also parasitic lead capacitances may be considerably reduced. This process is also amenable to either wet chemical or dry plasma processing.
Keywords :
Insulation thermal factors; Integrated circuit interconnections; Interconnections, Integrated circuits; Materials processing; Plastic insulation; Conductivity; Dielectric breakdown; Dielectric materials; Plasma chemistry; Plasma density; Plasma temperature; Polyimides; Silicon compounds; Tensile stress; Very large scale integration;
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
DOI :
10.1109/TCHMT.1982.1135990
