DocumentCode :
963974
Title :
Testing Programmable Logic Arrays by Sum of Syndromes
Author :
Serra, M. ; Muzio, J.C.
Author_Institution :
Department of Computer Science, University of Victoria, Victoria, B.C., Canada.
Issue :
9
fYear :
1987
Firstpage :
1097
Lastpage :
1101
Abstract :
Syndrome testing is a simple and effective fault detection technique applicable to many general circuits. It is particularly useful in two-level circuits, such as programmable logic arrays (PLA´s). For a multiple-output network, like PLA´s, existing methods test the individual syndromes for each function, where a fault should be detectable in at least one output. This paper shows that the weighted sum of syndromes of all the outputs covers all single stuck-at-faults, bridging faults, and cross-point faults. Primary input faults are also covered except in one special case which requires some preventive design for testability. This results in the use of one test to cover all single faults.
Keywords :
Built-in self-test; Circuit faults; Circuit testing; Design for testability; Electrical fault detection; Fault detection; Logic circuits; Logic testing; Programmable logic arrays; Very large scale integration; PLA; self-testing; syndrome testability;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1987.5009540
Filename :
5009540
Link To Document :
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