Title :
Self-Adjusting Networks for VLSI Simulation
Author :
Gecsei, Jan ; Cerny, Eduard
Author_Institution :
Département d´´Informatique et de Recherche Opérationnelle, Université de Montréal, Montréal, P.Q., Canada.
Abstract :
Magnitude networks [1l, [2] have been used as a theoretical base for switch-level simulation of MOS VLSI circuits. We address in this paper the particular problem of evaluating the influence of switches in unknown state on the steady-state response of the network. A two-pass procedure based on local controllers attached to such switches is described and a hardware implementation is proposed which models magnitude networks as self-adjusting combinational circuits.
Keywords :
Circuit simulation; Hardware; Logic circuits; MOSFETs; Multivalued logic; Statistics; Steady-state; Switches; Switching circuits; Very large scale integration; Magnitude network; VLSI simulation; simulation accelerator; switch-level model;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1987.5009544
