DocumentCode :
964262
Title :
The effect of code expanding optimizations on instruction cache design
Author :
Chen, William Y. ; Chang, P.P. ; Conte, Thomas M. ; Hwu, Wen-Mei W.
Author_Institution :
Illinois Univ., Urbana, IL, USA
Volume :
42
Issue :
9
fYear :
1993
fDate :
9/1/1993 12:00:00 AM
Firstpage :
1045
Lastpage :
1057
Abstract :
Shows that code expanding optimizations have strong and nonintuitive implications on instruction cache design. Three types of code expanding optimizations are studied in this paper: instruction placement, function inline expansion, and superscalar optimizations. Overall, instruction placement reduces the miss ratio of small caches. Function inline expansion improves the performance for small cache sizes, but degrades the performance of medium caches. Superscalar optimizations increase the miss ratio for all cache sizes. However, they also increase the sequentiality of instruction access so that a simple load forwarding scheme effectively cancels the negative effects. Overall, the authors show that with load forwarding, the three types of code expanding optimizations jointly improve the performance of small caches and have little effect on large caches
Keywords :
buffer storage; memory architecture; optimisation; C compiler; cache design; cache memory; code expanding optimizations; code expansion; code optimization; function inline expansion; instruction cache; instruction placement; large caches; load forwarding; medium caches; miss ratio; small caches; superscalar optimizations; Aerospace engineering; Cache memory; Contracts; Costs; Degradation; Design optimization; NASA; Optimizing compilers; Scheduling; Software systems;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.241594
Filename :
241594
Link To Document :
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