DocumentCode :
964778
Title :
A Simple Technique for Improving the Pull-in Capability of Phase-Lock Loops
Author :
Hiroshige, Kazuyuki
Author_Institution :
General Dynamics/Pomona, Pomona, Calif.
Issue :
1
fYear :
1965
fDate :
3/1/1965 12:00:00 AM
Firstpage :
40
Lastpage :
46
Abstract :
This paper presents a simple technique for improving the pull-in capability of phase-lock loops. This technique, called derived rate rejection or DRR, differs from those which use an external AFC loop in simplicity of implementation and design rationale, although the end result is the same. If, as is usually the case, a coherent detector accompanies the phase-lock loop, the implementation of the DRR technique requires only the addition of a switch. The switching logic results from a superficial consideration of the nonlinear equation for the phase-lock loop and its solution in the phase plane. The switch does not affect the normal behavior of the loop after lock has been attained. Results of computer studies show the improvement realizable for the following configurations: 1) Proportional-plus-integral control. 2) Proportional-plus-imperfect integral control. For an initial frequency error of five times the linearized phase lock-loop natural frequency, the improvement in pull-in time is a factor of two. For an initial frequency error of ten times the phase-lock loop natural frequency, the improvement in pull-in time is a factor of ten.
Keywords :
Automatic frequency control; Computer errors; Detectors; Frequency locked loops; Logic; Nonlinear equations; Phase detection; Pi control; Proportional control; Switches;
fLanguage :
English
Journal_Title :
Space Electronics and Telemetry, IEEE Transactions on
Publisher :
ieee
ISSN :
0096-2414
Type :
jour
DOI :
10.1109/TSET.1965.5009635
Filename :
5009635
Link To Document :
بازگشت