DocumentCode
964973
Title
Hot Spots Caused by Voids and Cracks in the Chip Mountdown Medium in Power Semiconductor Packaging
Author
Yerman, A.J. ; Burgess, James F. ; Carlson, Richard O. ; Neugebauer, Constantine A.
Author_Institution
General Electric Corp. Res. & Dev., Schenectady, NY, USA
Volume
6
Issue
4
fYear
1983
fDate
12/1/1983 12:00:00 AM
Firstpage
473
Lastpage
479
Abstract
The temperature increase under power dissipation in large semiconductor Chips mounted down with solder containing voids or cracks is explained in terms of two void types. They are distinguished on the basis of transient and steady-state thermal resistance measurements, and differ from each other in that for one the increased thermal resistance is mitigated by a reduced current density, but not for the other. They have been verified experimentally, and explain a large range of thermal and electrical characteristics, Such as occur in fatigue cycling.
Keywords
Power semiconductor devices; Semiconductor device bonding; Semiconductor device thermal factors; Current density; Electric resistance; Electric variables; Electrical resistance measurement; Fatigue; Power dissipation; Semiconductor device packaging; Steady-state; Temperature; Thermal resistance;
fLanguage
English
Journal_Title
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher
ieee
ISSN
0148-6411
Type
jour
DOI
10.1109/TCHMT.1983.1136207
Filename
1136207
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