DocumentCode :
965021
Title :
Placement algorithm for logic modules
Author :
Kazuhiro, Ueda
Author_Institution :
NTT, Integrated Circuit Section, Musashino Electrical Communication Laboratory, Musashino, Japan
Volume :
10
Issue :
10
fYear :
1974
Firstpage :
206
Lastpage :
208
Abstract :
The letter presents a placement algorithm that is based on the concepts of assuming an attractive force by `friendly components¿ and a repulsive force by `unfriendly components¿ and then allocating each component on a position balanced by these two opposite forces. This algorithm has some prominent features over conventional relaxation (or gravitational) methods.
Keywords :
computer-aided logic design; modules; computer aided logic design; logic modules; placement algorithm;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19740156
Filename :
4245115
Link To Document :
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