• DocumentCode
    965291
  • Title

    Fast b.c.d. multiplier

  • Author

    Agrawal, D.P.

  • Author_Institution
    Swiss Federal Institute of Technology, Lausanne, Switzerland
  • Volume
    10
  • Issue
    12
  • fYear
    1974
  • Firstpage
    237
  • Lastpage
    238
  • Abstract
    A fast b.c.d. multiplier is proposed, based on obtaining the product of a 1-digit multiplicand and a 1-digit multiplier in a single row of adders. For high-speed operation, the carry-save technique universally adopted for binary multipliers, is used.
  • Keywords
    digital arithmetic; BCD multiplier; high speed operation;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19740183
  • Filename
    4245144
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=965291