DocumentCode :
965943
Title :
Analysis, measurement, and simulation of dynamic write inhibit in an nvSRAM cell
Author :
Herdt, Christian E. ; De Araujo, Carlos A Paz
Author_Institution :
Simtek Corp., Colorado Springs, CO, USA
Volume :
39
Issue :
5
fYear :
1992
fDate :
5/1/1992 12:00:00 AM
Firstpage :
1191
Lastpage :
1196
Abstract :
Dynamic write inhibit (DWI) is a method of selectively inhibiting the programming (writing) of nonvolatile semiconductor memory cells. Its primary use is in silicon nitride oxide semiconductor (SNOS) and metal nitride oxide semiconductor (MNOS) memories, although it may be generalized to other nonvolatile technologies. This technique is based on a mechanism generally known as deep-depletion channel shielding (DDCS). A characterization of this phenomenon from the vantage points of analytic, experimental, and numerical simulations is presented. In addition, a brief review of the literature and the introduction of a novel memory cell used in a 64K nonvolatile static random access memory (nvSRAM) demonstrate the need for this better physical understanding
Keywords :
MOS integrated circuits; SRAM chips; VLSI; insulated gate field effect transistors; semiconductor device models; 64 kbit; MNOS memories; NVRAM; NVSRAM; SNOS memories; SRAM; Si-Si3N4-SiO2-Si; characterization; deep-depletion channel shielding; dynamic write inhibit; modelling; nonvolatile semiconductor memory cells; nonvolatile static random access memory; numerical simulations; physical understanding; selective programming; Analytical models; Capacitors; Dielectrics; Leakage current; Logic arrays; Nonvolatile memory; Numerical simulation; Silicon; Springs; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.129102
Filename :
129102
Link To Document :
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