Identification and implication of a perimeter tunneling current component in advanced self-aligned bipolar transistors

The identification of a perimeter tunneling current in the base-emitter junction of advanced double-poly self-aligned bipolar transistors has been verified by measuring based current as a function of temperature, bias voltage, and device perimeter-to-area ratio. The perimeter tunneling current at forward bias is found to be predominantly an excess tunneling that depends on the sidewall oxide interface properties, while that at reverse bias is due to band-to-band tunneling resulting from the emitter and extrinsic base profile overlap. Based on experimental results and an analysis of base-leakage-current trade-offs at forward and reverse bias, a device design concept was developed to enhance device performance and processing yield in scaled bipolar transistors