Finding all solutions of piecewise-linear resistive circuits using simple sign tests

Author

Yamamura, Kiyotaka

Author_Institution

Dept. of Comput. Sci., Gunma Univ., Japan

Volume

40

Issue

8

fYear

1993

fDate

8/1/1993 12:00:00 AM

Firstpage

546

Lastpage

551

Abstract

This paper presents an efficient algorithm for finding all solutions of piecewise-linear resistive circuits. The algorithm uses two types of sign tests; one is a new test that is proposed in this paper, and the other is the test proposed by Yamamura and Ochiai (1992). The computational complexity of the new test is much smaller than that of Yamamura and Ochiai´s test. These tests eliminate many linear regions that do not contain a solution. Therefore, the number of simultaneous linear equations to be solved is substantially reduced. The proposed algorithm is very simple and efficient

Keywords

circuit CAD; computational complexity; nonlinear network synthesis; piecewise-linear techniques; C language algorithm; computational complexity; efficient algorithm; piecewise-linear resistive circuits; sign tests; simultaneous linear equations; Circuit testing; Computational complexity; Computer science; Computer science education; Educational technology; Nonlinear circuits; Nonlinear equations; Performance evaluation; Piecewise linear techniques;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.242330

Filename

242330