• DocumentCode
    968474
  • Title

    A Discrete Logarithm Number System for Integer Arithmetic Modulo 2^{k}: Algorithms and Lookup Structures

  • Author

    Fit-Florea, Alexandru ; Li, Lun ; Thornton, Mitchell A. ; Matula, David W.

  • Author_Institution
    Adv. Micro Devices, Inc., Sunnyvale, CA
  • Volume
    58
  • Issue
    2
  • fYear
    2009
  • Firstpage
    163
  • Lastpage
    174
  • Abstract
    We present a k-bit encoding of the k-bit binary integers based on a discrete logarithm representation. The representation supports a discrete logarithm number system (DLS) that allows integer multiplication to be reduced to addition and integer exponentiation to be reduced to multiplication. We introduce right-to-left bit serial conversion, deconversion, and unified conversion/deconversion algorithms between binary and DLS. The conversion algorithms utilize O(k) additions, do not require the use of a multiplier, and are applicable at least up to 128-bit integers. We illustrate the use of the representation in determining a novel and efficient integer power modulo 2k operation |xy|2 k and compare hardware performance with a current state-of-the-art method. Furthermore, we describe properties of the conversion mappings that allow compact table lookup structures to be employed for direct conversion to and deconversion from the DLS encoding. Our lookup architecture allows 16-bit conversion and deconversion mappings to be realized with table sizes of order 2-8 Kbytes, which is up to a 64times size reduction of the 128 Kbytes of an arbitrary 16-bits-in, 16-bits-out function table. Performance and area results that demonstrate the effectiveness of the table lookup architecture are given. The lookup methodology extends to other 16-bit integer functions such as multiplicative inverse and squaring operations.
  • Keywords
    computational complexity; digital arithmetic; encoding; multiplying circuits; table lookup; computational complexity; discrete logarithm number system; discrete logarithm representation; integer arithmetic modulo; integer exponentiation; integer multiplication; integer power modulo; k-bit binary integer; k-bit encoding; right-to-left bit serial conversion; right-to-left bit serial deconversion; table lookup structure; Computer architecture; Computer science; Digital arithmetic; Encoding; Hardware; Instruments; Logic; Mathematics; Scalability; Table lookup; Upper bound; Arithmetic and logic units; Computer arithmetic; High-Speed Arithmetic; High-speed arithmetic; arithmetic and logic units; bit serial; computer arithmetic; conversions; discrete logarithm; integer power; number encodings; table lookup.;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2008.204
  • Filename
    4663061