DocumentCode
968580
Title
Linked faults in random access memories: concept, fault models, test algorithms, and industrial results
Author
Hamdioui, Said ; Al-Ars, Zaid ; Van de Goor, Ad J. ; Rodgers, Mike
Author_Institution
Intel Corp., Santa Clara, CA, USA
Volume
23
Issue
5
fYear
2004
fDate
5/1/2004 12:00:00 AM
Firstpage
737
Lastpage
757
Abstract
The analysis of linked faults (LFs), which are faults that influence the behavior of each other, such that masking can occur, has proven to be a source for new memory tests, characterized by an increased fault coverage. However, many newly reported fault models have not been investigated from the point-of-view of LFs. This paper presents a complete analysis of LFs, based on the concept of fault primitives, such that the whole space of LFs is investigated and accounted for and validated. Some simulated defective circuits, showing linked-fault behavior, will be also presented. The paper establishes detection conditions along with new tests to detect each fault class. The tests are merged into a single test March SL detecting all considered LFs. Preliminary test results, based on Intel advanced caches, show that its fault coverage is high as compared with all other traditional tests and that it detects some unique faults; this makes March SL very attractive industrially.
Keywords
fault diagnosis; integrated circuit testing; integrated memory circuits; random-access storage; Intel advanced caches; March SL; fault coverage; fault models; fault primitives; linked faults; random access memories; Circuit faults; Circuit simulation; Circuit testing; Computer science; Costs; Electrical fault detection; Fault detection; Laboratories; Mathematics; Ultra large scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2004.826578
Filename
1291585
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