Tolerances and Receiver Sensitivity Penalties of Multibit Delay Differential-Phase Shift-Keying Demodulation

Multibit delay demodulation of differential-phase shift-keying (DPSK) is finding applications in polarization interleaved modulation, optical time-domain multiplexing (OTDM), and multisymbol DPSK demodulation. Little attention has been paid to the degradation in tolerance and power penalty associated with multibit delay demodulation. We assess experimentally, numerically, and analytically the power penalties and tolerances associated with multibit delay DPSK demodulation. Numerical and analytical results show that the power penalty scales by a small factor of 0.2-0.35 dB per integer bit delay due to laser linewidth (LW) while experimental back-to-back results show a significant 1.2 dB per integer bit delay due to frequency offset penalty of longer bit delays. Frequency offset tolerance scales as 1/bit-delay and the delay-mismatch tolerance decreases by 20% for delays longer than 1 bit. A simple analytic model accounts for the combined effect of LW, frequency offset, and amplified spontaneous emission.