Title :
A processor family for personal computers
Author :
Childs, Robert E., Jr. ; Crawford, John ; House, David L. ; Noyce, Robert N.
Author_Institution :
Intel Corporation, Santa Clara, CA, USA
fDate :
3/1/1984 12:00:00 AM
Abstract :
Multiple window user interfaces executing on personal computers require high-performance hardware support. The Intel 80286 offers designers direct hardware support for multitasking as well as memory management and protection. A consistent segmented model of memory provides a direct path for object code compatibility with the 8086/8088 CPU chip, and eases program development in the 80286´s protected virtual address environment. In this protected mode, sophisticated protection policies, including those for secure operating systems, are available. This processor uses a four-stage pipelined architecture that includes autonomous prefetch, instruction decode, execution, and address translation. The architectural highlights of the 80286 chip are described in this paper.
Keywords :
Central Processing Unit; Decoding; Hardware; Memory management; Microcomputers; Multitasking; Operating systems; Prefetching; Protection; User interfaces;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/PROC.1984.12867