A 1/2.7-in 2.96 MPixel CMOS Image Sensor With Double CDS Architecture for Full High-Definition Camcorders

Author

Takahashi, Hidekazu ; Noda, Tomoyuki ; Matsuda, Takashi ; Watanabe, Takanori ; Shinohara, Mahito ; Endo, Toshiaki ; Takimoto, Shunsuke ; Mishima, Ryuichi ; Nishimura, Shigeru ; Sakurai, Katsuhito ; Yuzurihara, Hiroshi ; Inoue, Shunsuke

Author_Institution

Canon Inc., Ayase

Volume

42

Issue

12

fYear

2007

Firstpage

2960

Lastpage

2967

Abstract

A 1/2.7-in 1944 times 1484 pixel CMOS image sensor with double CDS architecture fabricated in a 0.18-mum single-poly triple-metal (1P3M) CMOS process is described. It operates at 48 MHz in a progressive scanning mode at 60 frames/s for full high-definition (HD) imaging. Two transistors/pixel architecture and low optical stack with double microlenses achieve 14.6 ke macr/1times ldr s sensitivity and 14 ke macr saturation. Double CDS architecture with a high-gain column amplifier realized a low noise floor of 3.5 e macr_rms. Optimized shallow-trench isolation achieved very low dark current of 12.2 e macr/s (60degC). This image sensor also realizes low power consumption of 220 mW.

Keywords

CMOS image sensors; video cameras; MPixel CMOS image sensor; frequency 48 MHz; high-definition camcorders; high-definition imaging; power 220 mW; temperature 60 degC; CMOS image sensors; CMOS process; High definition video; Optical imaging; Optical noise; Optical saturation; Optical sensors; Pixel; Stimulated emission; Video equipment; CMOS image sensor; column amplifier; double CDS; double microlenses; high definition (HD); high speed;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2007.908719

Filename

4381466