• DocumentCode
    973837
  • Title

    Efficient algorithm for FPGA board routing

  • Author

    Song, X. ; Dharmadhikari, M. ; Mohamed, O. Ait ; Chrzanowska-Jeske, M.

  • Author_Institution
    Dept. of ECE, Portland State Univ., OR, USA
  • Volume
    40
  • Issue
    8
  • fYear
    2004
  • fDate
    4/15/2004 12:00:00 AM
  • Firstpage
    469
  • Lastpage
    470
  • Abstract
    A simple and fast algorithm for solving the two-terminal board level routing problem in FPGA-based logic emulation systems is presented. The method is based on the net scan selection process. Experimental results are the first implemented results for an algorithm presented previously. The comparison results show that the current approach achieves better effectiveness and uses less CPU time.
  • Keywords
    field programmable gate arrays; network routing; optimisation; FPGA based logic emulation system; FPGA board routing; heuristic algorithm; net scan selection process; two terminal board level routing problem;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20040277
  • Filename
    1293624
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=973837