Delta-I noise specification for a high-performance computing machine

The design rule formulation for the switching noise containment in a high-performance machine is presented in this paper. This design rule is expressed as an algebraic inequality and condenses the information on the generation and propagation of the switching noise in a multichip carrier to a form that is directly usable for the logic design of a computing machine. The statistics associated with the two quantities essential for the rule derivation, namely, noise generation and noise tolerance, are explained. The methodology necessary for the development of this rule is also described. The experimental procedure used for the verification of this methodology is highlighted.