A 50-MHz 8-Mbit video RAM with a column direction drive sense amplifier

Author

Kotani, Hisakazu ; Akamatsu, Hironori ; Matsushima, Junko ; Okada, Shozo ; Shiragasawa, Tsuyoshi ; Yamada, Toshio ; Inoue, Michihiro

Author_Institution

Matsushita Electr. Ind. Co. Ltd., Osaka, Japan

Volume

25

Issue

1

fYear

1990

fDate

2/1/1990 12:00:00 AM

Firstpage

30

Lastpage

35

Abstract

An 8-Mb (1-Mwords×8-b) dynamic RAM which utilizes a column direction drive sense amplifier to obtain low peak current is described. The power supply peak current is about one fourth of that for conventional circuits. The chip operates at 50-MHz and is fabricated with a 0.7-μm n-well CMOS, double-level polysilicon, single-polycide, and double-level metal technology. The memory cell is a surrounding hi-capacitance cell structure. The cell size is 1.8×3.0 μm², and the chip area is 12.7×16.91 mm²

Keywords

CMOS integrated circuits; VLSI; amplifiers; integrated circuit technology; integrated memory circuits; random-access storage; video equipment; 0.7 micron; 1 Mbyte; 1.8 to 3 micron; 12.7 to 16.91 mm; 50 MHz; 8 Mbit; CMOS; DRAM; HDTV; ULSI; VRAM; cell size; chip area; column direction drive sense amplifier; double-level metal technology; double-level polysilicon; dynamic RAM; low peak current; memory cell; power supply peak current; single-polycide; surrounding capacitor cell; surrounding hi-capacitance cell structure; video RAM; Circuit noise; Counting circuits; Current supplies; DRAM chips; HDTV; Noise generators; Power supplies; Random access memory; Read-write memory; TV;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.50280

Filename

50280