Fault analysis and automatic test pattern generation for break faults in programmable logic arrays

The conventional fault models of PLAs are crosspoint, stuck-at and bridging fault models. Many techniques for PLA testing based on these fault models have been proposed in the past. However, these techniques cannot be applied to the break fault model due to the memory behaviour. Unfortunately, it has been shown that break faults occur frequently. Thus, considering a break fault model is important to enhance the quality of PLA testing. The behaviour of break faults in PLAs is analysed in detail and a complete PLA break fault ATPG system, PLABEK, is proposed. PLABEK contains four main parts: break fault collapsing: pruning algorithm based test pair generation; serial-fault-injection parallel-bit-operation event-driven break fault simulation; and testability-measure-based fault ordering. Experimental results show that PLABEK can generate very compact complete test sequences for break faults of PLAs very fast