Title :
3 V low noise amplifier implemented using a 0.8 μm CMOS process with three metal layers for 900 MHz operation
Author :
Ho, Y.-C. ; Biyani, M. ; Colvin, J. ; Smithhisler, C. ; O, K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
fDate :
6/20/1996 12:00:00 AM
Abstract :
A 3 V CMOS low noise amplifier (LNA) was implemented in a 0.81 μm CMOS process. This is the first CMOS amplifier which integrates input and output matching networks and integrated inductors formed using a conventional process. The LNA achieves a power gain of 14.3 dB and a noise figure of 4.5 dB, with a centre frequency of 820 MHz
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; feedback amplifiers; impedance matching; integrated circuit noise; 0.8 micron; 14.3 dB; 3 V; 4.5 dB; 820 to 900 MHz; CMOS LNA; CMOS amplifier; CMOS process; UHF operation; input matching network; integrated inductors; low noise amplifier; output matching network; three metal layers;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19960821
