Title :
A 6800 coprocessor for error detection in microcomputers: The PAD
Author :
Crouzet, Yves ; Chavade, Jacques
Author_Institution :
National Center for Scienific Research (CNRS), Toulouse-Cedex, France
fDate :
5/1/1986 12:00:00 AM
Abstract :
The aim of this paper is to present an LSI circuit specially designed for fault-tolerant systems. The circuit in question is a self-testing detection processor named PAD (a french acronym meaning self-testing detection processor). The purpose of the circuit is to enable the user to easily design and realize a fault-tolerant system with off-the-shelf ICs. The major part of this paper focuses on the design specifications of the chip which result from a preliminary study of different possible architectures for a fault-tolerant system.
Keywords :
Atherosclerosis; Built-in self-test; Circuit faults; Coprocessors; Electrical fault detection; Fault tolerance; Fault tolerant systems; Large scale integration; Microcomputers; Microprocessors;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/PROC.1986.13534
