DocumentCode
978630
Title
Process test chip for Josephson integrated circuits
Author
Klepner, S.P.
Author_Institution
IBM T. J. Watson Research Center, Yorktown Heights, NY, USA
Volume
17
Issue
1
fYear
1981
fDate
1/1/1981 12:00:00 AM
Firstpage
282
Lastpage
285
Abstract
Process test chips are fabricated along with chips containing experimental circuits in our laboratory in order to aid in forming a data base to characterize the technology. All the test sites are placed on a 6.35mm × 6.35mm chip with two distinct final wiring patterns. Wafers containing two chips of both types are processed along with the other substrates. Testing is done at the end of the run. Sites containing repetitive elements are populated at 1-10% of LSI density.
Keywords
Integrated circuit testing; Josephson devices; Circuit testing; Conductivity; Critical current; Current measurement; Electrical resistance measurement; Insulation; Integrated circuit testing; Resistors; Voltage; Wiring;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/TMAG.1981.1060966
Filename
1060966
Link To Document