DocumentCode :
978874
Title :
Motion estimation processor using mixed-signal approach
Author :
Panovic, Mladen ; Demosthenous, Andreas
Author_Institution :
Dept. of Electron. & Electr. Eng., Univ. Coll. London
Volume :
53
Issue :
6
fYear :
2006
fDate :
6/1/2006 12:00:00 AM
Firstpage :
492
Lastpage :
496
Abstract :
This paper describes the design, realization, and evaluation of a mixed-signal motion estimation processor using the full-search block-matching algorithm. The approach features digital I/O and a low-power, compact analog computational core. The proof-of-concept realization whose architecture incorporates pixel reuse, was fabricated in 0.8-mum CMOS technology occupying 0.65 mm2, and operates on 4 times 4 pixel blocks and a search area of 8 times 8 pixels. The processor achieves a low energy consumption per motion vector of 1.35 nJ and dissipates 0.8 mW from a 3-V power supply at QCIF 15 frames/s. The approach is intended for portable applications of digital video encoding
Keywords :
CMOS integrated circuits; low-power electronics; microprocessor chips; mixed analogue-digital integrated circuits; motion estimation; video coding; 0.8 mW; 0.8 micron; 3 V; CMOS technology; analog computational core; digital video encoding; full-search block-matching algorithm; mixed-signal approach; motion estimation processor; pixel reuse; Analog computers; CMOS technology; Circuits; Computer architecture; Encoding; Energy consumption; Motion estimation; PSNR; Performance evaluation; Video compression; Block matching; low-power CMOS circuits; mixed-signal circuits; motion estimation (ME); video encoding;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2006.873830
Filename :
1643468
Link To Document :
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