Modeling and simulation of a nanoscale three-region tri-material gate stack (TRIMGAS) MOSFET for improved carrier transport efficiency and reduced hot-electron effects

Author

Goel, Kirti ; Saxena, Manoj ; Gupta, Mridula ; Gupta, R.S.

Author_Institution

Dept. of Electron. Sci., Univ. of Delhi, New Delhi

Volume

53

Issue

7

fYear

2006

fDate

7/1/2006 12:00:00 AM

Firstpage

1623

Lastpage

1633

Abstract

Two-dimensional (2-D) analytical modeling for a novel multiple region MOSFET device architecture-Tri-Material Gate Stack MOSFET-is presented, which shows reduced short-channel effects at short gate lengths. Using a three-region analysis in the horizontal direction and a universal depletion width boundary condition, the 2-D potential and electric field distribution in the channel region along with the threshold voltage of the device are obtained. The proposed model is capable of modeling electrical characteristics like surface potential, electric field, and threshold voltage of various other existent MOSFET structures like dual-material-gate, electrically induced shallow junction/straddle-gate (side-gate), and single-material-gate MOSFETs, with and without the gate stack architecture. The 2-D device simulator ATLAS is used over a wide range of parameters and bias conditions to validate the analytical results

Keywords

MOSFET; electric fields; hot carriers; semiconductor device models; surface potential; 2D analytical modeling; ATLAS device simulator; TRIMGAS MOSFET; carrier transport improvement; dual-material-gate MOSFET; electric field distribution; electrical characteristics; electrically induced shallow junction; gate leakage current; potential distribution; reduced hot-electron effects; short-channel effects; single-material-gate MOSFET; straddle-gate MOSFET; surface potential; three-region analysis; threshold voltage; tri-material gate stack; Analytical models; Boundary conditions; Electric potential; Electrodes; FETs; High K dielectric materials; High-K gate dielectrics; Leakage current; MOSFET circuits; Threshold voltage; ATLAS device simulation software; gate leakage current; gate stack; hot-electron effects; short-channel effects (SCEs);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2006.876272

Filename

1643496