Title :
Bit-sequential array for pattern matching
Author :
Tewari, Neeraj ; Wagh, Meghanad D.
Author_Institution :
Lehigh University, Bethlehem, PA, USA
Abstract :
This letter presents the design and analysis of a bit-sequential array for pattern matching applications. The architecture makes multiple use of each data sample, has built-in concurrency and pipelining, and is based on a highly modular design with only nearest neighbor connections between array modules. The array computes all occurrences of a pattern of length m, in the string of length n, in O(m + n) time and O(m) hardware. The pattern and the string are fed in sequentially and the match indicators come out in the same fashion, leading to a significant reduction in silicon area.
Keywords :
Computer architecture; Concurrent computing; Hardware; Information systems; Nearest neighbor searches; Pattern analysis; Pattern matching; Pipeline processing; Signal reconstruction; Software algorithms;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/PROC.1986.13652