Title :
Integrated MOS four-quadrant analogue multiplier using switched-capacitor technique
Author :
Yasumoto, Masayoshi ; Enomoto, Tetsuya
Author_Institution :
Nippon Electric Co. Ltd., Microelectronics Research Laboratories, Kawasaki, Japan
Abstract :
A fully integrated four-quadrant analogue multiplier based on switched-capacitor technique for realisation of high-speed and high-density analogue LSIs was developed using a MOS VLSI process. Excellent characteristics such as low total harmonic distortion of ¿50 dB for two input signals of 1 Vp-p, large dynamic range of 80 dB and fast operation speed of 2 MHz clock rate were obtained. Application to convolvers and correlators is also demonstrated.
Keywords :
field effect integrated circuits; integrated circuit technology; large scale integration; multiplying circuits; switched capacitor networks; 2 MHz; LSIs; MOS VLSI process; convolvers; correlators; fully integrated four-quadrant analogue multiplier; switched-capacitor technique; total harmonic distortion;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19820520
