DocumentCode :
9823
Title :
3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections
Author :
Khan, Noel ; Li Hong Yu ; Tan Siow Pin ; Soon Wee Ho ; Kripesh, V. ; Pinjala, D. ; Lau, John H. ; Toh Kok Chuan
Author_Institution :
Inst. of Microelectron., Agency for Sci., Technol. & Res., Singapore, Singapore
Volume :
3
Issue :
2
fYear :
2013
fDate :
Feb. 2013
Firstpage :
221
Lastpage :
228
Abstract :
In this paper, a liquid cooling solution has been reported for 3-D package in package-on-package format. A high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via (TSV) for electrical interconnection and hollow TSV for fluidic circulation. Heat transfer enhancement structures have been embedded in the chip carrier. Cooling liquid, de-ionized water is circulated through the chip carrier and heat from the chip is extracted. The fluidic channels are isolated from electrical traces using hermetic sealing. The research work has demonstrated liquid cooling solution for 100 W from one stack and total of 200 W from two stacks of the package. The fluidic interconnections and sealing techniques have been discussed.
Keywords :
cooling; copper; hermetic seals; integrated circuit interconnections; integrated circuit packaging; three-dimensional integrated circuits; 3D packaging; Cu; deionized water; electrical interconnection; fluidic circulation; fluidic interconnection; heat transfer enhancement; hermetic sealing; liquid cooling; package-on-package format; sealing technique; through silicon via; Heat transfer; Heating; Liquid cooling; Thermal resistance; Through-silicon vias; 3-D packaging; liquid cooling; micro-channel cooling;
fLanguage :
English
Journal_Title :
Components, Packaging and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
2156-3950
Type :
jour
DOI :
10.1109/TCPMT.2012.2186297
Filename :
6410399
Link To Document :
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