Title :
The design of the 88000 RISC family
Author_Institution :
Motorola Inc., Austin, TX, USA
fDate :
4/1/1989 12:00:00 AM
Abstract :
The design and implementation of the RISC (reduced-instruction-set computer) 88000 system in high-speed, complementary metal-oxide semiconductor (HCMOS) technology is described. The total system consists of the 88100 processor and two 88200 cache memory management units (CMMUs). The various features and components of the 88000 are discussed.<>
Keywords :
CMOS integrated circuits; microprocessor chips; reduced instruction set computing; 88100 processor; 88200 cache memory management units; HCMOS technology; Motorola 88000 RISC family; RISC family; reduced-instruction-set computer; Adders; Circuits; Computer aided instruction; Design engineering; Electronics industry; Embedded computing; Multitasking; Reduced instruction set computing; Silicon; Workstations;
Journal_Title :
Micro, IEEE
