A Compact Single-FPGA Fading-Channel Simulator

This brief presents a novel computationally efficient design and implementation of a Rayleigh flat fading-channel simulator. To generate complex Gaussian variates with the required U-shaped power spectrum, the simulator utilizes an infinite-impulse response (IIR) spectrum shaping filter followed by multistage interpolators and low-pass IIR filters. The new simulator significantly simplifies the characterization of wireless systems by providing a fast and area-efficient field-programmable gate array (FPGA) implementation of the fading channel. Our fixed-point Rayleigh fading-channel simulator utilizes only 4% of the configurable slices, 20% of the dedicated multipliers, and 2% of the available memories on a Xilinx Virtex2P XC2VP100-6 FPGA, while generating 25 million fading variates per second. The parameterized fading-channel simulator can be readily reconfigured to accurately simulate a wide variety of different channel characteristics.