DocumentCode :
983820
Title :
A statistical model for integrated-circuit yield with clustered flaws
Author :
Shier, John
Author_Institution :
VTC Inc., Bloomington, MN, USA
Volume :
35
Issue :
4
fYear :
1988
fDate :
4/1/1988 12:00:00 AM
Firstpage :
524
Lastpage :
525
Abstract :
An explicit statistical model for die yield in integrated circuits (ICs) is developed. The model includes the effect of defect clustering, and is based on empirical observations of IC yield patterns. Using the simplest assumptions it leads to the well-known gamma-function yield formula
Keywords :
integrated circuit manufacture; integrated circuit technology; monolithic integrated circuits; statistical analysis; IC yield patterns; die yield; effect of defect clustering; empirical observations; gamma-function yield formula; integrated-circuit yield; monolithic ICs; statistical model; Costs; Elementary particles; Equations; Finite difference methods; Integrated circuit modeling; Monte Carlo methods; Semiconductor device modeling; Statistical distributions; Testing;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.2490
Filename :
2490
Link To Document :
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