DocumentCode
984344
Title
On estimation accuracy for guiding low-power resynthesis
Author
Lennard, Christopher K. ; Newton, A. Richard
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume
15
Issue
6
fYear
1996
fDate
6/1/1996 12:00:00 AM
Firstpage
644
Lastpage
664
Abstract
There are three properties which define the global effect on power of a resynthesis step: change in function, change in spurious dynamic activity, and change in delay. In this paper, it is shown that the prediction of change in power due to change in functionality and change in spurious dynamic activity is accurate at high levels of estimator abstraction. Change in power due to change in delay is not. However, the magnitude of the effect of delay on power during resynthesis is shown to be the least critical of the three properties
Keywords
CMOS logic circuits; combinational circuits; delays; logic design; CMOS; combinational logic; delay; estimation accuracy; estimator abstraction; global effect; low-power resynthesis; spurious dynamic activity; CMOS logic circuits; Capacitance; Capacitors; Clocks; Delay effects; Energy dissipation; Power dissipation; Rails; Semiconductor device modeling; Voltage;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.503934
Filename
503934
Link To Document