DocumentCode
984849
Title
The Impact of Aging Effects and Manufacturing Variation on SRAM Soft-Error Rate
Author
Cannon, Ethan H. ; KleinOsowski, A.J. ; Kanj, Rouwaida ; Reinhardt, Daniel D. ; Joshi, Rajiv V.
Author_Institution
IBM Syst. & Technol. Group, Essex
Volume
8
Issue
1
fYear
2008
fDate
3/1/2008 12:00:00 AM
Firstpage
145
Lastpage
152
Abstract
This paper describes modeling and hardware results of how the soft-error rate (SER) of a 65-nm silicon-on-insulator SRAM memory cell changes over time, as semiconductor aging effects shift the SRAM cell behavior. This paper also describes how the SER changes in the presence of systematic and random manufacturing variation.
Keywords
SRAM chips; ageing; integrated circuit manufacture; silicon-on-insulator; SER; SRAM soft-error rate; manufacturing variation; semiconductor aging effects; silicon-on-insulator SRAM memory cell; size 65 nm; Critical charge (Qcrit); critical charge; radiation event; single event upset (SEU); soft error rate (SER); soft errors; soft-error rate (SER);
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2007.912983
Filename
4385729
Link To Document