A theoretical model for the current-voltage characteristics of a floating-gate EEPROM cell

Author

Liong, Luey Chwan ; Liu, Po-ching

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore

Volume

40

Issue

1

fYear

1993

fDate

1/1/1993 12:00:00 AM

Firstpage

146

Lastpage

151

Abstract

A model for current-voltage characteristics of an EEPROM cell has been developed and used in the simulation of an EEPROM test structure. It provides an explanation for the observed strong drain-induced barrier lowering effect and the role of trapped charge in the floating gate. In this model, the surface potential is related to the terminal voltages through an equivalent electrical circuit. Charge sheet and depletion approximation are used to describe the charge distribution in the semiconductor. Gradual approximation is assumed in deriving the drain current equation. A simplified drain current equation under a strong inversion condition is derived. An expression defining the extrapolated threshold voltage is obtained. It is useful in parameter extraction. A new method for extracting the drain coupling ratio and the channel coupling ratio is proposed. Finally, it is shown that extrapolated threshold voltage is a convenient quantity for classifying the threshold voltage of an EEPROM cell

Keywords

EPROM; MOS integrated circuits; equivalent circuits; integrated memory circuits; semiconductor device models; simulation; EEPROM cell; I/V characteristics; channel coupling ratio; charge distribution; current-voltage characteristics; depletion approximation; drain coupling ratio; drain current equation; drain-induced barrier lowering effect; equivalent electrical circuit; extrapolated threshold voltage; floating-gate; parameter extraction; semiconductor; simulation; strong inversion condition; surface potential; terminal voltages; theoretical model; trapped charge; Circuit simulation; Circuit testing; Current-voltage characteristics; Degradation; EPROM; Electron traps; Equations; Nonvolatile memory; Threshold voltage; Tunneling;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.249437

Filename

249437