Temperature-dependent characteristics of BiCMOS digital circuits

The temperature dependency of BiCMOS delay-time characteristics is evaluated. A BiCMOS temperature model, based on a numerical device algorithm, is presented and has been used to generate the transient response and various key delay components as functions of temperature. The temperature effects on scaling, crossover capacitance, sensitivity to load capacitance, and delay time degradation by supply voltage reduction have also been studied. A comparative analysis evaluating the temperature-dependent behavior of scaled and unscaled BiCMOS, BiNMOS, and CMOS is also presented. The effect of temperature on the latchup of merged BiCMOS structures has also been studied. It has been found that, at low temperatures, BiCMOS maintains its superior performance and shows less sensitivity to the load capacitance, especially if low-temperature operation is combined with device scaling. It is also shown that the latchup that would occur near room temperature or higher in merged structures has ceased to occur at lower temperatures