DocumentCode :
985714
Title :
A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation
Author :
Quader, Khandker N. ; Li, Chester C. ; Tu, Robert ; Rosenbaum, Elyse ; Ko, Ping K. ; Hu, Chenming
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume :
40
Issue :
12
fYear :
1993
fDate :
12/1/1993 12:00:00 AM
Firstpage :
2245
Lastpage :
2254
Abstract :
An approach for modeling hot-electron induced change in drain current that significantly improves the ease of parameter extraction and provides new capabilities for modeling the effect of bidirectional stressing and the asymmetrical I-V characteristics after stressing is presented. The change in the drain current, ΔID is implemented as an asymmetrical voltage-controlled current source and the new ΔID model is independent of the MOSFET model used for circuit simulation. The physical basis of the model, the analytical model equations, the implementation scheme in BERT (BErkeley Reliability Tools) simulator and simulation results for uni- and bidirectional circuit stressing are presented
Keywords :
digital simulation; electronic engineering computing; hot carriers; insulated gate field effect transistors; reliability; semiconductor device models; BERT simulator; NMOSFET model; analytical model equations; asymmetrical I-V characteristics; bidirectional current reduction model; bidirectional stressing; drain current; hot-carrier-induced circuit degradation; hot-electron induced change; implementation scheme; n-channel MOSFET; parameter extraction; simulation; voltage-controlled current source; Analytical models; Bit error rate; Circuit simulation; Degradation; Forward contracts; Hot carriers; MOSFET circuits; Predictive models; SPICE; Stress;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.249472
Filename :
249472
Link To Document :
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