Title :
Scaling theory for double-gate SOI MOSFET´s
Author :
Suzuki, Kunihiro ; Tanaka, Tetsu ; Tosaka, Yoshiharu ; Horie, Hiroshi ; Arimoto, Yoshihiro
Author_Institution :
Fujitsu Labs. Ltd., Atsugi, Japan
fDate :
12/1/1993 12:00:00 AM
Abstract :
A scaling theory for double-gate SOI MOSFETs, which gives guidance for device design (silicon thickness tsi; gate oxide thickness tox) that maintains a subthreshold factor for a given gate length is discussed. According to the theory, a device can be designed with a gate length of less than 0.1 μm while maintaining the ideal subthreshold factor. This is verified numerically with a two-dimensional device simulator
Keywords :
insulated gate field effect transistors; semiconductor device models; semiconductor-insulator boundaries; 0.1 mum; S-factor; Si-SiO2; device design; double-gate SOI MOSFET; gate length; gate oxide thickness; numerical simulation; scaling theory; silicon thickness; subthreshold factor; two-dimensional device simulator; Capacitance; Degradation; Dielectric constant; Doping; Guidelines; MOSFET circuits; Poisson equations; Silicon compounds; Transconductance; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
