Reconfigurable readback-signal generator based on a field-programmable gate array

We have designed a readback-signal generator to provide noise-corrupted signals to a read channel simulator. It is implemented in a Xilinx Virtex-E field-programmable gate array (FPGA) device. The generator simulates in hardware the noise processes and distortions observed in hard drives. It uses embedded nonuniform random number generators to simulate the random characteristics of various disturbances in the read/write process. The signal generator can simulate readback pulses, intersymbol interference, transition noise, electronics noise, head and media nonlinearity, intertrack interference, and write timing error according to the characteristics specified by the user. A sample implementation operates at a 70-MHz clock speed. The design can easily be scaled for different error rates. The generator can be reconfigured in real time to give the user flexibility and increase the capacity of the FPGA device. The readback-signal generator can be integrated into an FPGA read channel simulator or serve as a test bench for data-recovery circuits.