• DocumentCode
    986391
  • Title

    Simplifying the Design of ΣΔModulators Using FGMOS Transistors

  • Author

    Rodriguez-Villegas, Esther ; Xu, Min

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Imperial Coll. London, London, UK
  • Volume
    56
  • Issue
    7
  • fYear
    2009
  • fDate
    7/1/2009 12:00:00 AM
  • Firstpage
    1313
  • Lastpage
    1325
  • Abstract
    This paper presents the novel design of a second-order continuous-time low-power and low-voltage SigmaDelta modulator. The modulator illustrates a design philosophy based on taking advantage of the extended number of degrees of freedom of the floating-gate MOS transistor. The transistor is simultaneously used to fulfill the following: simplify the topology; accurately implement the modulator coefficients; compensate for gain losses in the integrator and several nonidealities in the comparator; increase the signal range; reduce distortion; shift signal levels according to the specific requirements of individual devices; implement an easy common-mode sensing and feedback strategy; and tune the loop filter and reset the comparator. The modulator operates at 1 V and consumes just over 5 muW of power for a signal-to-noise-and-distortion ratio of 60 dB and a maximum bandwidth of 2 kHz, which are typical of many biomedical applications.
  • Keywords
    MOSFET; logic design; low-power electronics; network topology; sigma-delta modulation; FGMOS transistor; bandwidth 2 kHz; common-mode sensing; degrees of freedom; floating-gate MOS transistor; loop filter; low-voltage SigmaDelta modulator; power 5 muW; second-order continuous-time low-power modulator; shift signal level; signal-to-noise-and-distortion ratio; voltage 1 V; ΣΔ modulator; Floating-gate MOS (FGMOS); low-power analog;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2008.2007061
  • Filename
    4671070