DocumentCode :
986496
Title :
FPGA-based system-on-chip designs for real-time applications in particle physics
Author :
Anvar, Shebli ; Gachelin, Olivier ; Kestener, Pierre ; Le Provost, Herve ; Mandjavidze, Irakli
Author_Institution :
DAPNIA, CEA, Centre d´´Etudes Nucl. de Saclay, Gif-sur-Yvette, France
Volume :
53
Issue :
3
fYear :
2006
fDate :
6/1/2006 12:00:00 AM
Firstpage :
682
Lastpage :
687
Abstract :
In this paper, we describe our experience in designing real-time hardware/software systems for data acquisition and analysis applications in particle physics, which are based on a system-on-chip (SoC) approach. Modern field-programmable gate array (FPGA) devices with embedded reduced instruction set computing (RISC) processor cores, high-speed low voltage differential signaling (LVDS) links and ready-to-use multigigabit transceivers allow development of compact systems with a substantial number of input-output (IO) channels, where required performance is obtained by a subtle separation of tasks among closely cooperating programmable hardware logic and user-friendly software environment. We report on the implementation of two such systems to illustrate the advantages of the SoC architectures. One is a flexible test bench for the off-shore read-out system of the ANTARES neutrino experiment. Another is a selective read-out processor device for the CMS electromagnetic calorimeter at LHC.
Keywords :
data acquisition; field programmable gate arrays; hardware-software codesign; high energy physics instrumentation computing; particle calorimetry; reduced instruction set computing; system-on-chip; user interfaces; ANTARES neutrino experiment; CMS electromagnetic calorimeter; FPGA-based system-on-chip designs; LHC; LVDS; RISC; compact systems; data acquisition; embedded reduced instruction set computing processor cores; flexible test bench; high-speed low voltage differential signaling links; input-output channels; modern field-programmable gate array devices; off-shore read-out system; particle physics; platform FPGA; programmable hardware logic; ready-to-use multigigabit transceivers; real-time hardware systems; real-time software systems; selective read-out processor device; trigger; user-friendly software environment; Application software; Data acquisition; Data analysis; Field programmable gate arrays; Hardware; Programmable logic arrays; Real time systems; Reduced instruction set computing; Software systems; System-on-a-chip; Embedded processor; platform FPGA; real-time system; system-on-chip design; trigger and data acquisition system;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2006.875076
Filename :
1644925
Link To Document :
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