Title :
Three-layer router for channels with constrained terminals
Author :
Detry, R.J. ; Jayasumana, A.P.
Author_Institution :
TRW Space and Defense, Aurora, CO, USA
fDate :
11/1/1993 12:00:00 AM
Abstract :
With recent advances in vertical-integration technology, it is now reasonable to consider a three-dimensional IC structure containing either partially or completely stacked active layers. Thus it is possible to have stacked terminals at the channel edges. In this case, each terminal is constrained to a specific layer and therefore may only enter the channel on the layer to which it is constrained. For a channel of length lambda using n layers for routing, it is now possible to have 2n lambda terminals on the edges of the channel. A new channel-routing algorithm is presented for routing channels consisting of stacked and constrained terminals. The algorithm employs greedy heuristics, routing the channel column by column from left to right. The router guarantees a solution, although one or more extra columns off the end of the channel may be required. The heuristics of the router can be easily modified to rearrange priorities or to add new requirements or constraints. The algorithm has been tested extensively using randomly-generated channel descriptions. Very good solutions were obtained in a short amount of CPU time.
Keywords :
circuit layout; minimisation of switching nets; monolithic integrated circuits; network routing; 3D IC structure; CPU time; channel edges; channel-routing algorithm; constrained terminals; greedy heuristics; stacked active layers; three-layer router; vertical-integration technology;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E