DocumentCode :
986933
Title :
A CMOS V-I converter with 75-dB SFDR and 360-μW power consumption
Author :
Ouzounov, Sotir ; Roza, Engel ; Hegt, Johannes A Hans ; van der Weide, Gerard ; Van Roermund, Arthur H M
Author_Institution :
Mixed-Signal Microelectron. Group, Tech. Univ. of Eindhoven, Netherlands
Volume :
40
Issue :
7
fYear :
2005
fDate :
7/1/2005 12:00:00 AM
Firstpage :
1527
Lastpage :
1532
Abstract :
This work describes a method for analysis of voltage-to-current converters (V-I converters or transconductors) and a novel V- I converter circuit with significantly improved linearity. The new circuit utilizes a combination of cross-coupling and local resistive feedback for a significant, simultaneous suppression of the third- and fifth-order harmonic distortion components in the transconductor characteristics. An evaluation of the optimal circuit dimensioning is shown. Simple and robust design rules are derived for the chosen operation conditions. The transistor implementation is presented and a prototype V- I converter is realized in a digital 0.18-μm CMOS technology. The measured spurious-free dynamic range is 75 dB in a frequency band of 10 MHz. The circuit occupies less than 0.02 mm2 and dissipates 360 μW.
Keywords :
CMOS digital integrated circuits; convertors; harmonic distortion; 0.18 micron; 10 MHz; 360 muW; CMOS transconductors; converter circuit; digital CMOS technology; harmonic balancing; harmonic distortion components; linearization; CMOS technology; Distortion measurement; Energy consumption; Feedback circuits; Harmonic distortion; Linearity; Prototypes; Robustness; Transconductors; Voltage; CMOS transconductors; harmonic balancing; linearization;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2005.847496
Filename :
1458997
Link To Document :
بازگشت