DocumentCode
986975
Title
Adaptive order reduction scheme for high-order single-bit ΔΣ Modulators
Author
Bourdopoulos, George I.
Author_Institution
Dept. of Phys., Univ. of Patras, Greece
Volume
51
Issue
5
fYear
2004
fDate
5/1/2004 12:00:00 AM
Firstpage
213
Lastpage
216
Abstract
A scheme for achieving adaptive reduction in the order of the loop filter of usual high-order, single-stage, single-bit Delta-Sigma (ΔΣ) modulators is proposed in order to improve their performance. The resulting ΔΣ modulators can recover from instability effectively, having also an extended input signal range in comparison to that of the corresponding conventional ΔΣ modulators.
Keywords
circuit noise; circuit stability; delta-sigma modulation; modulators; Δ-Σ modulators; adaptive order reduction; high-order modulators; loop filter; signal stabilization; signal-to-noise ratio; single-bit modulators; single-stage modulators; Adaptive filters; Amplitude modulation; Analog-digital conversion; Delta modulation; Digital modulation; Distributed feedback devices; Power supplies; Resonator filters; Signal to noise ratio; Stability; $ Delta Sigma $ ; Delta–Sigma; signal-to-noise ratio; stabilization;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2004.827549
Filename
1299033
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