• DocumentCode
    987496
  • Title

    True swap gate design for on chip cache organization megabit bubble memory

  • Author

    Kohara, H. ; Takahashi, K. ; Suga, S. ; Fujiwara, S.

  • Author_Institution
    Nippon Electric Company, Ltd., Kawasaki, Japan
  • Volume
    17
  • Issue
    6
  • fYear
    1981
  • fDate
    11/1/1981 12:00:00 AM
  • Firstpage
    3038
  • Lastpage
    3040
  • Abstract
    A highly reliable true swap gate for on chip cache organization megabit chip has been developed, which was designed to swap bubble strings between cache and storage by controlling current in a single conductor pattern. This gate consists of two pairs of transfer gate and merge to match 7 μm period folded minor loop. The gate conductor was improved so as not to block the bubble propagation by the swap out current during the continuous operation. The results in actual 1 Mb chips showed a wide margin of 22 Oe, reliable operation with a 15 mA gate current, 55 Oe to 65 Oe sinusoidal rotating field drive at 125 kHz, 0° to 75° C temperature and less margin loss of 2.0 Oe on the constant order swap mode operation, which eased bubble controller for on chip cache organization.
  • Keywords
    Magnetic bubble memories; Cache storage; Circuits; Conductors; Costs; Detectors; Equations; Frequency; Temperature control;
  • fLanguage
    English
  • Journal_Title
    Magnetics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9464
  • Type

    jour

  • DOI
    10.1109/TMAG.1981.1061760
  • Filename
    1061760