Title :
Address generators for mapping arrays in bit-reversed order
Author :
Harley, Thomas R. ; Maheshwaramurthy, G.P.
Author_Institution :
Texas Instrum.´´ VoIP Group, Germantown, MD, USA
fDate :
6/1/2004 12:00:00 AM
Abstract :
A new technique enables fast Fourier transform (FFT) software to more efficiently use memory and processing time. The technique is used to design address pair generators for mapping an array in bit-reversed order. For exemplary digital signal processing (DSP) processors, in-place bit-reversed mappings based on the new technique were found to often have better computational efficiency than an out-of-place mapping.
Keywords :
digital signal processing chips; fast Fourier transforms; address generators; array mapping; bit-reversed order; digital signal processing processors; fast Fourier transform software; path visualization; Computational efficiency; Design methodology; Digital signal processing; Digital signal processors; Discrete Fourier transforms; Fast Fourier transforms; Instruments; Registers; Signal mapping; Signal processing algorithms; Computation time; discrete Fourier transform; software requirements and specifications;
Journal_Title :
Signal Processing, IEEE Transactions on
DOI :
10.1109/TSP.2004.827148
